Copyright 1986-1999, 2001-2013 Xilinx, Inc. All Rights Reserved.
-----------------------------------------------------------------------------------------
| Tool Version : Vivado v.2013.2 (lin64) Build 272601 Sat Jun 15 11:11:11 MDT 2013
| Date         : Tue Mar 13 20:42:49 2018
| Host         : predaking running 64-bit Linux Mint 18.2 Sonya
| Command      : report_clock_utilization -file switchToLED_clock_utilization_placed.rpt
| Design       : switchToLED
| Device       : xc7z020
-----------------------------------------------------------------------------------------

Clock Utilization Report

Table of Contents
-----------------
1. Clock Primitive Utilization
2. Details of Global Clocks
3. Details of Regional Clocks
4. Details of Multi-Regional Clocks
5. Details of Local Clocks
6. Clock Regions : Key Resource Utilization

1. Clock Primitive Utilization
------------------------------

+-------+------+-----------+------------+
| Type  | Used | Available | Num Locked |
+-------+------+-----------+------------+
| BUFG  |    0 |        32 |          0 |
| BUFH  |    0 |        72 |          0 |
| BUFIO |    0 |        16 |          0 |
| MMCM  |    0 |         4 |          0 |
| BUFR  |    0 |        16 |          0 |
| BUFMR |    0 |         8 |          0 |
+-------+------+-----------+------------+


2. Details of Global Clocks
---------------------------

3. Details of Regional Clocks
-----------------------------

4. Details of Multi-Regional Clocks
-----------------------------------

5. Details of Local Clocks
--------------------------

6. Clock Regions : Key Resource Utilization
-------------------------------------------

+-------------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+
|                   | Global Clock |     BUFRs    |    BUFMRs    |    BUFIOs    |     MMCM     |      PLL     |      GT      |      PCI     |    ILOGIC    |    OLOGIC    |      FF      |     LUTM     |    RAMB18    |    RAMB36    |    DSP48E1   |
+-------------------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+
| Clock Region Name | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail |
+-------------------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+
| X0Y0              |    0 |    12 |    0 |     4 |    0 |     2 |    0 |     4 |    0 |     1 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |    50 |    0 |    50 |    0 | 20000 |    0 |  4000 |    0 |   120 |    0 |    30 |    0 |    60 |
| X1Y0              |    0 |    12 |    0 |     4 |    0 |     2 |    0 |     4 |    0 |     1 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |    50 |    0 |    50 |    0 | 25600 |    0 |  3400 |    0 |   120 |    0 |    30 |    0 |    40 |
| X0Y1              |    0 |    12 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |  9600 |    0 |  1600 |    0 |    40 |    0 |    10 |    0 |    20 |
| X1Y1              |    0 |    12 |    0 |     4 |    0 |     2 |    0 |     4 |    0 |     1 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |    50 |    0 |    50 |    0 | 20800 |    0 |  3400 |    0 |   120 |    0 |    30 |    0 |    40 |
| X0Y2              |    0 |    12 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |  9600 |    0 |  1600 |    0 |    36 |    0 |     9 |    0 |    20 |
| X1Y2              |    0 |    12 |    0 |     4 |    0 |     2 |    0 |     4 |    0 |     1 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |    50 |    0 |    50 |    0 | 20800 |    0 |  3400 |    0 |   108 |    0 |    27 |    0 |    40 |
+-------------------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+
* RAMB36 site can be used as two RAMB18/FIFO18 sites



# Location of BUFG Primitives 

# Location of IO Clock Primitives

# Location of MMCM Clock Primitives

# Location of BUFH Clock Primitives

# Location of BUFR Clock Primitives

# Location of BUFMR Clock Primitives

# Location of PLL Clock Primitives

# Location of IO Primitives which is load of clock spine

# Location of clock ports
